The present invention relates to a method and an apparatus for semiconductor wafer heat treatment.
Conventionally, in order to form a thin film such as an oxide film on a wafer or diffuse an impurity in a wafer, a heat treatment for heating a wafer is performed. At this time, a semiconductor wafer heat treatment apparatus shown in FIG. 1A is used, for example.
The semiconductor wafer heat treatment apparatus shown in FIG. 1A is called a batch-system hot-wall-type diffusion furnace, and is constituted by a boat (i.e., a jig) 2 for holding a plurality of wafers 1, a chamber 3 constituting a processing chamber for processing the wafers 1 held in the boat 2, and a heater 4 for heating the wafers. In the chamber 3, an inlet 5 for introducing, e.g., a reaction gas into a reaction chamber and an outlet 6 for exhausting the reaction gas from the reaction chamber are arranged.
Each wafer 1 is horizontally held such that the edge portion of the wafer 1 are loaded on convex portions formed in the boat 2. The wafer 1 is, as shown in FIG. 1B for example, held at, e.g., four holding points 7 formed on the edge portion for the following reason. That is, a contact area between the wafer 1 and the boat 2 is minimized to reduce an amount of heat radiation absorbed by the boat 2 and uniformly heat the wafer 1. When the wafer 1 is loaded on the boat 2 or unloaded from the boat 2, the above arrangement is employed to make treatment of the wafer 1 easy. In this manner, a member for horizontally holding the wafer 1 is generally called a susceptor.
However, due to the gravitational load of the wafer 1, stress is generated inside the wafer 1 and at the holding points 7 in the wafer 1. In particular, since the holding points 7 are similar to dots, stress is concentrated on the holding points 7.
Stress .sigma. generated inside the wafer 1 can be calculated on the basis of the following equation: EQU .sigma.=(3.times.(3+v).times.q.times.r.sup.2)/(8.times.h.sup.2) (1)
where v is Poisson's ratio, q is a load per unit area, r is the radius of the wafer, and h is the width (thickness) of the wafer.
FIG. 2 shows the relationship between the stress generated inside the wafer and the diameter of the wafer. As a parameter, the thickness of the wafer is changed. Since the gravitational load of the wafer increases with an increase in diameter of the wafer, the stress increases. When the thickness of the wafer decreases, the stress of that increases.
When a heat treatment at a high temperature is performed in a state where such stress is present inside the wafer, a crystal defect generally called a slip occurs inside the wafer. For example, when the diameter of the wafer is 200 mm, the stress inside the wafer is about 5.times.10.sup.6. It is known that a slip occurs due to the gravitational load of the wafer when a heat treatment at about 1,200.degree. C. is performed in the state where the stress is present inside the wafer.
With an increase in diameter of the wafer, as shown in FIG. 2, stress generated inside the wafer increases. In general, as stress increases, a temperature at which the slip occurs decreases.
FIG. 3A shows the relationship between a temperature in which a slip occurs in side a wafer and a diameter of the wafer. Referring to FIG. 3A, in a boundary region, occurrence of a slip is influenced by not only stress but also another factor. For this reason, FIG. 3A shows the temperature region in which a slip occurs varies. As shown in FIG. 3A, the diameter of the wafer increases, stress (see FIG. 3B) generated by the gravitational load increases. For this reason, a critical temperature at which a slip occurs decreases. More specifically, occurrence of a crystal defect caused by stress generated by gravitational load becomes a more remarkable problem in accordance with an increase in diameter of the wafer.
The above problems are summarized as follows.
In a conventional method and apparatus for semiconductor wafer heat treatment, stress is generated inside the wafer by the gravitational load of the wafer. When a heat treatment is performed in the presence of the stress, a crystal defect disadvantageously occurs. Since the gravitational load of the wafer increases with an increase in diameter of the wafer, a crystal defect disadvantageously occurs in a heat treatment at a lower temperature.